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New chip design makes parallel programs run many times faster and requires one-tenth the code

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In the May/June issue of the Institute of Electrical and Electronics Engineers’ journal Micro, researchers from MIT’s Computer Science and Artificial Intelligence Laboratory will present a new chip design they call Swarm, which should make parallel programs not only much more efficient but easier to write, too.

“You have to explicitly divide the work that you’re doing into tasks, and then you need to enforce some synchronization between tasks accessing shared data. What this architecture does, essentially, is to remove all sorts of explicit synchronization, to make parallel programming much easier. There’s an especially hard set of applications that have resisted parallelization for many, many years, and those are the kinds of applications we’ve focused on in this paper.”

It time-stamps tasks according to their priorities and begins working on the highest-priority tasks in parallel. Higher-priority tasks may engender their own lower-priority tasks, but Swarm slots those into its queue of tasks automatically. Occasionally, tasks running in parallel may come into conflict. The Swarm chip has extra circuitry to store and manage its queue of tasks.

Thread-level speculation is a related technique that uses transactional-memory ideas for parallelization: Do it without being sure the task is parallel, and if it’s not, undo and re-execute serially.

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Article originally posted at techxplore.com

Post Author: Carla Parsons

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